A question regarding PCIe power domain, to make sure I understand it correctly. So currently we have PCIE1_PWR_EN domain which controls:
- PCIe1 1v5 rail (U19)
- PCIe1 3v3 rail (U20) which in turn controls:
- PCIe1 3v3 AUX
- PCIe2 REFCLK
which means if I do PWR3/p3 command it does:
- Power off PCIe1 main power rail (this is intended function i think)
- Power off PCIe1 aux power rail (this I think is wrong as it is supposed to power config register)
- Power off PCIe2 REFCLK power rail (this I think is totally off as it cripples NVMe)
Or am I reading it wrong? The thing is that whenever I issue p3 command the system hangs. And it hangs even when I remove all devices from 0000 bus. Which was the reason I started analyzing schematics and LPC code to understand what actually happens.