RKX7 Kintex FPGA module update?

Just curious if there are any updates on this. Has the design been finalized?

Coincidentally, I’ve been (and still working on) finalizing revision 2 this week. I posted some routing shots on my Twitter, too.

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Awesome!

So many questions:

  • What tooling do you use to program the FPGA?
  • Do you use another Reform and JTAG?
  • Which JTAG interface?
  • Presumably this module will also work with the Pocket Reform

I can’t wait for this, so many possibilities (mess around with stack machines (M17, rtx 2000, etc), maybe Lisp Machine inspired stuff, and of course more prosaic stuff like RISC-V)

  • Currently, the default P&R tool is Vivado. The free webpack edition can target the XC7K160T, but for the bigger XC7K325T you need a Vivado license. The FPGAs are pin compatible.
  • I am building the default SoC with LiteX (and linux-on-litex-vexriscv), this way you don’t have to touch the Vivado tooling/GUI. LiteX will automatically run the P&R tooling as part of the (commandline based) build process.
  • Theoretically you can now make a bitstream with the reverse engineering effort prjxray instead of Vivado, but I haven’t tried it yet. This would be de desirable of course.
  • For flashing / JTAG I am using a cheap clone of the Xilinx Platform Cable USB, which is supported by xc3sprog.
  • The module will also work with the Pocket Reform motherboard, yes.
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Here are 2 renders of revision 2 of the module PCB I just ordered today:


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I managed to bring up a full Linux system on a dual core RISC-V soft CPU (VexRiscV) and the LiteX SoC, and integreate the module in MNT Reform. Photos:

https://twitter.com/minut_e/status/1575958855800205312?s=20&t=ufNSUt5UJSD2ET5t_BmuZg

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